Registers.hh

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/*
 * Copyright 2021 Assured Information Security, Inc.
 *
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 *         http://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 */
#pragma once
 
#include <introvirt/core/arch/x86/Cr0.hh>
#include <introvirt/core/arch/x86/Cr4.hh>
#include <introvirt/core/arch/x86/Efer.hh>
#include <introvirt/core/arch/x86/Flags.hh>
#include <introvirt/core/arch/x86/Msr.hh>
#include <introvirt/core/arch/x86/Segment.hh>
 
#include <cstdint>
 
namespace introvirt {
namespace x86 {
 
class Registers {
  public:
    virtual uint64_t rax() const = 0;
    virtual void rax(uint64_t val) = 0;
 
    virtual uint64_t rbx() const = 0;
    virtual void rbx(uint64_t val) = 0;
    virtual uint64_t rcx() const = 0;
    virtual void rcx(uint64_t val) = 0;
 
    virtual uint64_t rdx() const = 0;
    virtual void rdx(uint64_t val) = 0;
 
    virtual uint64_t r15() const = 0;
    virtual void r15(uint64_t val) = 0;
 
    virtual uint64_t r14() const = 0;
    virtual void r14(uint64_t val) = 0;
 
    virtual uint64_t r13() const = 0;
    virtual void r13(uint64_t val) = 0;
 
    virtual uint64_t r12() const = 0;
    virtual void r12(uint64_t val) = 0;
 
    virtual uint64_t r11() const = 0;
    virtual void r11(uint64_t val) = 0;
 
    virtual uint64_t r10() const = 0;
    virtual void r10(uint64_t val) = 0;
 
    virtual uint64_t r9() const = 0;
    virtual void r9(uint64_t val) = 0;
 
    virtual uint64_t r8() const = 0;
    virtual void r8(uint64_t val) = 0;
 
    virtual uint64_t rsi() const = 0;
    virtual void rsi(uint64_t val) = 0;
 
    virtual uint64_t rdi() const = 0;
    virtual void rdi(uint64_t val) = 0;
 
    virtual uint64_t rsp() const = 0;
    virtual void rsp(uint64_t val) = 0;
 
    virtual uint64_t rbp() const = 0;
    virtual void rbp(uint64_t val) = 0;
 
    virtual uint64_t rip() const = 0;
    virtual void rip(uint64_t val) = 0;
 
    virtual Flags& rflags() = 0;
 
    virtual const Flags& rflags() const = 0;
 
    virtual void rflags(const Flags& val) = 0;
 
    virtual Efer efer() const = 0;
 
    virtual uint64_t msr(Msr msr) const = 0;
 
    virtual void msr(Msr msr, uint64_t val) = 0;
 
    virtual Segment cs() const = 0;
 
    virtual void cs(x86::Segment seg) = 0;
 
    virtual bool cs_long_mode() const = 0;
 
    virtual Segment ds() const = 0;
 
    virtual Segment es() const = 0;
 
    virtual Segment fs() const = 0;
 
    virtual Segment gs() const = 0;
 
    virtual Segment ss() const = 0;
 
    virtual Segment tr() const = 0;
 
    virtual Segment ldt() const = 0;
 
    virtual Cr0 cr0() const = 0;
 
    virtual uint64_t cr2() const = 0;
 
    virtual uint64_t cr3() const = 0;
 
    virtual Cr4 cr4() const = 0;
 
    virtual uint64_t cr8() const = 0;
 
    virtual uint64_t gdtr_base() const = 0;
 
    virtual uint32_t gdtr_limit() const = 0;
 
    virtual uint64_t idtr_base() const = 0;
 
    virtual uint32_t idtr_limit() const = 0;
 
    virtual ~Registers() = default;
};
 
} // namespace x86
 
using Registers = x86::Registers;
 
} // namespace introvirt